Detail publikace

Parallelizing boundary surface computation of Chua’s circuit

RÁCZ, Z. SOBOTA, B. GUZAN, M.

Originální název

Parallelizing boundary surface computation of Chua’s circuit

Typ

článek ve sborníku ve WoS nebo Scopus

Jazyk

angličtina

Originální abstrakt

This paper introduces a method for performing parallel computations of the boundary surface of Chua's circuit. The presented approach could be characterized as a SIMD method which is based on the utilization of all available CPU cores. Performance comparisons between single and parallelized calculations on different computer systems are included in a table at the end of the article. The best results were observed using the highest compiler optimisation options on 64 bit architecture and using Intel i7 CPUs.

Klíčová slova

cross-section; boundary surface; chaos; Chua’s circuit; attractor; Intel TBB; parallelization; SIMD

Autoři

RÁCZ, Z.; SOBOTA, B.; GUZAN, M.

Vydáno

19. 4. 2017

Nakladatel

UREL FEKT VUT v Brně

Místo

Brno

ISBN

978-1-5090-4592-1

Kniha

Proceedings of 27th International Conference Radioelektronika

Strany od

132

Strany do

135

Strany počet

4

URL

https://ieeexplore.ieee.org/abstract/document/7937582

BibTex

@inproceedings{BUT143651,
  author="RÁCZ, Z. and SOBOTA, B. and GUZAN, M.",
  title="Parallelizing boundary surface computation of Chua’s circuit",
  booktitle="Proceedings of 27th International Conference Radioelektronika",
  year="2017",
  pages="132--135",
  publisher="UREL FEKT VUT v Brně",
  address="Brno",
  doi="10.1109/RADIOELEK.2017.7937582",
  isbn="978-1-5090-4592-1",
  url="https://ieeexplore.ieee.org/abstract/document/7937582"
}